Welcome to TopJTAG Probe

TopJTAG Probe is a boundary-scan (JTAG) based simple logic analyzer and circuit debugging software. It provides the ability to monitor pin values in real-time without interference with the normal operation of a working device and to interactively set up pin values for testing of board-level interconnects or on-chip internal logic.

Help Topics

  • Starting a New Project
  • JTAG Chain (Main) View
  • Pins Window
  • Waveform Window
  • Watch Window
  • BSDL Files
  • Pin Names and Buses
  • JTAG Instructions: SAMPLE, EXTEST, INTEST and BYPASS
  • Registration
  • End-User License Agreement

Contact Information

Support: support@topjtag.com

Website: www.topjtag.com


Starting a New Project

To start working with boundary-scan devices TopJTAG Probe first needs to detect a JTAG chain. By examining the JTAG chain the software recognizes the number of devices in the chain and each device IDCODE.

In order to create a new project you must launch New Project Wizard. To begin with, you must setup the JTAG connection used to communicate with your design. Currently TopJTAG Probe supports these JTAG adapters:

  • Altera USB-Blaster
  • Generic FTDI FT2232
  • Segger J-Link
  • Digilent JTAG-USB
  • Xilinx Parallel Cable III and IV
  • Altera ByteBlaster MV and II
  • Lattice Parallel ispDownload
  • Wiggler
  • Embest EasyICE

In the wizard, go to the next page to launch the JTAG chain examination. Once the chain is detected TopJTAG Probe will show each device manufacturer name and IDCODE.

On page three of the wizard BSDL files can be assigned to devices. If the device IDCODE was received upon JTAG chain examination, you may specify the directories containing BSDL files and the software will then search these directories for the BSDL file that matches the relevant device IDCODE.

BSDL files can usually be downloaded from the device manufacturers' websites.

You might want to specify device packaging information to view graphical package outline on JTAG Chain (Main) view. The package drawing has device pins with color coded values that are updated during a scan.

Once the wizard has finished, you can go to menu Scan > Run (or press F5) to start a boundary-scan.


JTAG Chain (Main) View

The JTAG Chain view (main program's view) shows package outlines with color-coded pin values. These values are updated while the boundary-scan is running.

Both the BSDL file and package must be specified in order for the device to show its pins. In some cases the package type is automatically detected when the BSDL file is selected, but when this does not occur the package will have to be selected manually. Go to menu Scan > Package to specify the device packaging information.

A device 'friendly name' and a BSDL file entity name are displayed above the package outline. By default, the first device in the chain is given the name Dev1, the second Dev2, and so on. The 'friendly name' can be changed in the Device Properties dialog window.

A device instruction is displayed below the package outline.

Pin values are color-coded. Black means 0, red — 1, brown — high-Z, and blue — linkage pin. For bidirectional pins it is possible to display either input or output values. This can be changed by selecting menu View > Inout Pins Displaying.

To assist you in the analyzing of device operation, TopJTAG Probe provides these tools:

  • Pins window displays the pin or bus name, pin number, port name, type and current value for every pin on the selected device. Any pin can be quickly located by typing its name, number or port name in a search edit box.
  • Waveform window records and displays waveforms. This is a wonderful tool to view and analyze a signal's history, which is particularly useful for fast changing signals.
  • Watch window can monitor every signal and display the value and a transition count, which shows how many times a value has changed.


Pins Window

The Pins window lists all pins belonging to the selected device. Any pin can be quickly located by typing its name, number or port name into the search box. The pin or bus name, pin number, port name, type and current value are displayed for every pin.

Port is a meaningful symbolic name which describes the input or output from the device's internal logic. Ports are declared in the BSDL files. It may be that the same device core can be incorporated into several types of packages. For each available package, the BSDL file specifies mapping between core ports and package pins.

The BSDL file and package must be specified for the device in order to display details in the Pins window. If the package type is "Don't care" then pins are not displayed.

The pin type is displayed in the 'Type' column. There are 4 pin types available:

  • linkage — a static pin with no associated boundary-scan cells. GND and VCC are linkage pins
  • in — the input pin
  • out — the output pin
  • inout — a bidirectional pin

Only pins with associated boundary-scan cells can be observed and/or manipulated. The rest, without associated boundary-scan cells (they might not be only linkage pins), are displayed in gray in the Pins window.

Input pins can have a value of 1 or 0. Output pins have a value of 1, 0 or a high-impedance state: Z, WEAK0, WEAK1, PULL0, PULL1, or KEEPER. The value of bidirectional pins is displayed as an input/output pair. In front of the slash is an input value that is definitely present on the pin, while after the slash is an output value that the pin is trying to drive out (ie the output buffer state). For example, '1/Z' means that the output buffer is in a high-impedance state, so the bidirectional pin acts as the input and real signal value on the pin is 1.

Click the right mouse button on a selected pin to show a popup menu which allows you to find the pin on a graphical package outline, add a pin to the watch window, add a pin to the waveform window and set the pin value when the device is in EXTEST or INTEST mode.


Waveform Window

The Waveform window records and displays waveforms. This is a wonderful tool to view and analyze a signal's history. It is particularly useful for fast changing signals.

To add a pin to the Waveform window, select the pin (either in the Pins or Watch window), right click the mouse and choose 'Add to Waveform'. Another method is to move the mouse cursor to the pin drawn on the graphical package outline, right click the mouse and again choose 'Add to Waveform'.

For each bidirectional pin a pair of waveforms is recorded. One waveform shows the signal actually present on a pin. This waveform has 'in of inout' displayed in the type column. The second waveform shows the output buffer state, ie what the pin is actually trying to drive out. This waveform is referenced as 'out of inout'.

If 'out of inout' is in a high-impedance state, then the bidirectional pin is working as the input; otherwise, the pin actively outputs 1 or 0.


Watch Window

The Watch window keeps pins of interest in one place to simplify monitoring and/or control.

Unlike the Pins window, which changes content every time the user selects another device, the Watch window always stores pins added by the user. For every pin added, the Watch window displays the current value and a 'Transition Count' showing how many times a value has changed. Increase of the 'Transition Count' reveals signal transitions that may be very fast and therefore invisible to the naked eye.

To add a pin to the Watch window, select that pin (either in the Pins or Waveform window), right click the mouse and choose 'Add to Watch'. Another method is to move the mouse cursor to the pin drawn on the graphical package outline, right click the mouse and again choose 'Add to Watch'.


BSDL Files

The BSDL file contains a description of how the device JTAG test logic is implemented. If you wish to monitor and/or control boundary-scan device pins, the BSDL file must be specified for that device. However, if you are not interested in observing device pins, the device can be placed into BYPASS mode, which may not require presence of the BSDL file.

By placing the device into BYPASS mode, TopJTAG Probe only needs to know the device instruction register length. In some cases it can be automatically detected when examining the JTAG chain information. Otherwise it can be specified manually in the Device Properties dialog window. But, more probably, the easiest way is just to specify the device BSDL file.

BSDL files can usually be downloaded from the device manufacturers' websites.

In order to assign a BSDL file for the selected device, go to menu Scan > BSDL File, which opens the BSDL File dialog window. Here you may define a list of directories which TopJTAG Probe will search for a BSDL file matching the device IDCODE. The IDCODE is a 32 bit number that identifies a device manufacturer, part number and version. It is received from the JTAG chain when devices are detected. Alternatively, instead of searching, the BSDL file can be manually selected for the device if you are certain of its location.


Pin Names and Buses

Each pin can be assigned a name (don't confuse it with pin number). Pin name is just a label that helps you distinguish the pin from others. Pin name can be ented by user (right click on the pin in Pins window and select Name Pin...). Also pin names can be imported from Xilinx ISE constraints (.ucf) file and Altera Quartus II .qsf file (go to menu Pins -> Edit Pin Names and Buses, press Import... button).

It is possible to group pins into buses so state of multiple pins can be set at once as hex, binary or decimal value. For example, if you want to read word from a parallel flash chip, it is convenient to define address and data buses and then set address as hex or decimal value and monitor data output as hex value. Buses can be defined manually in Edit Pin Names and Buses dialog or can be imported from Xilinx UCF and Altera QSF files.


JTAG Instructions: SAMPLE, EXTEST, INTEST and BYPASS

SAMPLE: Monitoring Normal Device Operation

The SAMPLE instruction is designed for monitoring the pins of a working device. In this mode, TopJTAG Probe repeatedly takes snapshots of the state of boundary-scan device pins, without interfering with the normal device operation.

A BSDL file must be specified for the device in order to use the SAMPLE instruction.

EXTEST: Testing Off-Chip Circuitry

The purpose of the EXTEST instruction is to test off-chip circuitry and board-level interconnections. Loading this instruction onto the instruction register (IR) enables the control of device outputs and the observation of inputs. You can define values to drive out on the output and bidirectional pins, and monitor received values on input and bidirectional pins. The device internal logic is disconnected from the package pins during the EXTEST mode.

A BSDL file must be specified for the device in order to use the EXTEST instruction.

There are two options available for initial pin values when the device enters the EXTEST mode. The first involves boundary-scan cells being loaded with 'safe' values defined in the BSDL file; this usually puts output and bidirectional pins into a high impedance state. The second option involves retaining the present values (ie the last values received in SAMPLE or INTEST mode) on output and bidirectional pins.

To change a signal driven out of the device pin, just select the pin (either on Pins, Waveform or Watch window), right click the mouse and choose one of the 'Set to 0/1/Z' menu items or press a corresponding hot-key: Ctrl+0, Ctrl+1 or Ctrl+Z.

INTEST: Testing On-Chip Logic

The INTEST instruction is designed for testing on-chip internal logic. Loading this instruction onto the instruction register (IR) enables the control of inputs and the observation of outputs of a device's on-chip internal logic. Device 'package pins' in INTEST are disconnected from the on-chip logic and kept in states described in the BSDL file as 'safe' (usually high-impedance). You can define values to drive into the on-chip logic on input and bidirectional pins, and monitor received values on output and bidirectional pins.

A BSDL file must be specified for the device in order to use the INTEST instruction. Moreover, not all boundary-scan devices support the INTEST instruction. When INTEST is not supported the corresponding radio-button in the Instruction dialog window is disabled.

There are two options available for initial pin values when the device enters INTEST mode. The first involves boundary-scan cells being loaded with some 'safe' values defined in the BSDL file. The second option involves retaining the present values (ie the last values received in SAMPLE or EXTEST mode) on input pins and bidirectional pins acting as inputs.

To change a signal driven into the 'on-chip pin', select the pin (either on the Pins, Waveform or Watch window), right click the mouse and choose one of the 'Set to 0/1' menu items or press a corresponding hot-key: Ctrl+0 or Ctrl+1.

BYPASS: Skip Device

The BYPASS instruction allows to 'skip' device when you don't care about it. It minimizes device presence in a JTAG chain allowing for faster scan. You don't need to specify a package and in some cases even a BSDL file for the device.


Registration

You are invited to try a fully functional version of TopJTAG Probe for 20 days. If you wish to use the software after the evaluation period, please purchase a license key.

A single license purchase entitles you to use the software on one computer. If you intend to install TopJTAG Probe on more than one machine, please purchase the appropriate number of licenses.

Buy TopJTAG Probe online by visiting http://www.topjtag.com/buy/. After purchase, a confirmation email will be sent to you with your license key. Simply enter this key into the Registration dialog to unlock your copy of TopJTAG Probe.

As a registered user, you will be entitled to free minor version updates and considerable discounts on major updates. If you have purchased TopJTAG Probe in the six months preceding a major new release, you will be entitled to a free upgrade.

Support email: support@topjtag.com


TOPJTAG PROBE SOFTWARE LICENSE AGREEMENT

These license terms are an agreement between you and the author of TopJTAG Probe software (the "author") for the accompanying software product (the "software"). The term "you" means the individual person installing or using the software on his or her own behalf; or, if the software is being installed on behalf of a company, "you" means that company and the person installing the software, who represents that he or she has the authority to do so on the company's behalf.

By using the software, you accept these license terms. If you do not accept them, do not use the software.

* Anyone may use the software during a test period of 20 days. Following this test period of 20 days or less, if you wish to continue to use the software, you must register using the "license key" issued to you.

* One license key entitles you to register one copy of the software on one computer. If you wish to install the software on more than one machine, you must acquire the appropriate number of licenses (license keys).

* Multiple people may use non-simultaneously same one copy of the software on a single computer.

* Once registered, you are granted a non-exclusive license to use the software for any legal purpose.

* The license key, issued to you, may not be distributed outside of the area of your legal control, without written permission of the author. Any distribution of the license key shall result in immediate and automatic termination of the rights granted in this agreement.

* Unregistered trial version of the software may be freely distributed, with exceptions noted below, provided the distribution package is not modified in any way.

* No person or company may distribute separate parts of the package, without written permission of the author.

* Unregistered trial version of the software may not be distributed inside of any other software package without written permission of the author.

* If you give feedback about the software to the author, you give to author, without charge, the right to use, share and commercialize your feedback in any way and for any purpose. You will not give feedback that is subject to a license that requires author to license his software or documentation to third parties because he include your feedback in them. These rights survive this agreement.

* The software is licensed, not sold. This agreement only gives you some rights to use the software. The author reserves all other rights. Unless applicable law gives you more rights despite this limitation, you may use the software only as expressly permitted in this agreement. In doing so, you must comply with any technical limitations in the software that only allow you to use it in certain ways. You may not use, copy, emulate, clone, rent, lease, sell, modify, decompile, disassemble, otherwise reverse engineer, or transfer the software, or any subset of the software, except as provided for in this agreement. Any such unauthorized use will result in immediate and automatic termination of this license and may result in criminal and/or civil prosecution.

* This agreement describes certain legal rights. You may have other rights under the laws of your country. You may also have rights with respect to the party from whom you acquired the software. This agreement does not change your rights under the laws of your country if the laws of your country do not permit it to do so.

* DISCLAIMER OF WARRANTY:
THE SOFTWARE IS DISTRIBUTED "AS IS". NO WARRANTY OF ANY KIND IS EXPRESSED OR IMPLIED. YOU USE AT YOUR OWN RISK. THE AUTHOR WILL NOT BE LIABLE FOR DATA LOSS, DAMAGES, LOSS OF PROFITS OR ANY OTHER KIND OF LOSS WHILE USING OR MISUSING THIS SOFTWARE.