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Getting Started with TopJTAG Flash Programmer

Before you can start with programming the flash, TopJTAG Flash Programmer needs to be configured properly to work with your design. There are four things you need to setup: (1) JTAG chain parameters, (2) flash memory parameters, (3) connections of flash memory pins to pins of the JTAG chain device or devices, and (4) a list of any pins that need to be held at a certain constant value during programming. All settings are entered using the Setup dialog (menu Setup → Setup). The settings can be saved as a design Setup File (.topflash), and loaded whenever you work with the same design again.

1) JTAG Chain Setup

JTAG chain settings are specified on the first JTAG chain tab in the Setup dialog.

TopJTAG Flash Programmer provides two ways to define JTAG chain parameters: (1) run the JTAG chain Examination Wizard to automatically detect the number of devices in a JTAG chain and their IDCODEs, or (2) manually enter the number of devices in a chain. The recommended is the first option; the second option is only intended for cases when the JTAG chain is not currently connected to the computer (i.e. when you just want to setup the software now and going to use it to program the flash later).

To allow the software to control the pins of the JTAG chain device it is necessary to assign a BSDL file for that device. The BSDL (Boundary-Scan Description Language) file describes how a boundary-scan (JTAG) test logic is implemented in a particular device. Chip vendors usually provide BSDL files for download from their websites. In most cases, it is enough to assign a BSDL file only for the device or devices which pins are connected to flash memory pins. Other devices in the JTAG chain are put into BYPASS mode (i.e. work as normal and have a minimized presence in the JTAG chain to speed up a scan).

To put the device into BYPASS mode, the software only needs to know the device Instruction Register (IR) length, which is sometimes detected automatically when the software examines the JTAG chain. Unfortunately, the boundary-scan standard (IEEE 1149.1) does not provide 100% automatic detection of the device's IR length, so it is sometimes necessary to provide it manually. The easiest way to achieve this is to assign a BSDL file for the device and the software will obtain the IR length from the file. Alternatively, the device IR length can be entered manually; it can be obtained, for example, by reading the device datasheet.

Some BSDL files may contain multiple packaging options for the same silicon. To select the proper package for the device, press the Pin map button or click the BSDL pin map link.

Once the JTAG chain parameters have been set up, they can be verified — just press the Verify button. The software will then examine the connected JTAG chain and verify whether the data entered conforms to the data read from the chain.

2) Flash Memory Settings

Flash memory settings are specified on the second Flash array tab in the Setup dialog.

  • DATA bus organization. From the drop-down menu select the total data bus width (8, 16, 24 or 32 bits) by choosing a pair of parameters: the number of memory chips in a flash array (1, 2, 3 or 4 chips), and the data width of a single chip (8, 16 or 32 bits).
  • The maximum data width a single chip is capable of. Most 16-bit capable flash memory chips work as either 8-bit or 16-bit memories depending on the BYTE# pin signal. There is a significant difference in supplying command sequences for a 16-bit chip working in 16-bit mode (the BYTE# is high), and a 16-bit chip working in 8-bit mode (the BYTE# is low). The actual data width of a single chip is already selected on the DATA bus organization drop-down menu. By selecting the maximum data width a single chip is capable of, the software is instructed whether memory chip or chips are working in maximum data width mode (i.e. the BYTE# is high) or not (i.e. the BYTE# is low). Similar rules also apply to 32-bit memories: they can have a WORD# signal to choose between 32- and 16-bit mode, and a BYTE# signal to choose between 32- and 8-bit mode.

For settings on the Program and Erase algorithm section the default options will usually be what you want.

  • Command set. The default Auto-Detect (Recommended) option is the best choice for 99% of designs. When this option is selected, TopJTAG Flash Programmer first tries to detect if flash memory is CFI (Common Flash Interface) compliant. If so, the command set is obtained by reading the CFI table. TopJTAG Flash Programmer can work with any parallel NOR flash memory that is compatible with AMD or Intel, standard or extended command sets. If flash is not CFI-compliant, the software sends Intel and AMD style commands to read the device ID. The successful command (from an Intel or AMD command set) indicates the device command set. There is only a tiny probability of the failure to detect a command set: when the flash is not CFI-compliant and the first two words in a flash memory are equal to the manufacturer and device ID. In this case, the software cannot establish if the read device ID commands are successful, so it is necessary to manually specify the command set. Another case when you may wish to disable the command set auto-detection is when reading SRAM or OTP (One Time Programmable) memory contents. In this instance, just select any Intel or AMD command set (it does not matter which) to disable auto-detection.
  • If supported, use buffered programming instead of word-by-word. Some flash memories only support word-by-word programming. Many modern flash memories support both word-by-word programming (slower) and buffered programming (faster). When detecting the command set, TopJTAG Flash Programming automatically recognizes if flash supports buffered programming. Since buffered programming is faster, you, most probably, will always want this option to be selected. However, if for any reason you wish so, you can choose to use slower word-by-word programming.
  • Do not check status while programming (use only with small TCK frequency). When this option is deselected (by default), during programming the software checks special pins to detect if flash memory has completed with programming of the previous word (or sequence of words) and is ready to accept and program the next data. However, for JTAG connections with small TCK frequency there is not much sense in checking the readiness signal as it takes longer to read the pins state than the maximum theoretical word (buffer) programming time. Since by running a Verify action you can always check if all data has been successfully programmed, you may wish to select this option to speed up programming when using slow JTAG connections (parallel port JTAG adapters and USB adapters with TCK frequency set to a few hundred KHz). For fast USB JTAG adapters with TCK frequency more than 1MHz, it is recommended to have this option deselected.
  • [AMD specific] Use Unlock Bypass mode for programming. This option (selected by default) only affects word-by-word programming of flash memories compatible with AMD command set. It is ignored when using buffered programming or when programming Intel compatible flashes. Unlock Bypass mode is supported by most AMD compatible flashes and makes word-by-word programming about twice as fast. There are a few AMD compatible flashes that do not support Unlock Bypass; to program these devices (using word-by-word algorithm) this option should be deselected.
  • [Sectors]. In order to erase the entire chip when the full chip erase command is unsupported and to erase and lock/unlock individual sectors, TopJTAG Flash Programmer needs to know the configuration of flash memory sectors. Most of the modern flashes are CFI (Common Flash Interface) compliant and provide sectors configuration in a CFI table. If 'Flash is CFI-compliant — no need to define sectors info' is selected, the software automatically obtains sectors configuration by reading the CFI table. For non-CFI flashes, sectors configuration can be entered manually: just deselect the checkbox and press the Define Sectors button to show the Sectors dialog. The flash memory sectors information can usually be found on the device datasheet.

3) Signal Pins

Connections of the flash address, data and control pins to the pins of JTAG chain device(s) are specified on the third Signal pins tab in the Setup dialog.

The signal pins list contains Chip Enable (CE), Output Enable (OE), Write Enable (WE), address (A0-A31) and data (D0-D31) pins. It is only necessary to specify connections that are applicable to the hardware being used. For example, if the data bus width is 16-bit wide, just specify connections for D0-D15 pins (i.e. D16 through D31 must be left empty). For example, if a flash memory has 20 address lines the connections for A0-A19 address pins should be specified and the rest left empty.

If the flash Chip Enable signal is hardwired on a board and not controlled from a JTAG chain device, the CE pin must be left empty on a signal pins list. Otherwise, the CE pin connection should be specified so that the software can enable the flash memory chip(s) before programming and disable them upon completion. Alternatively, the pin can be set at a constant enabling value (usually 0) using the static pins list (see below for the Static pins tab).

In order to send commands to flash chip(s) (e.g. to execute actions like program or erase), the software needs to toggle the signals on the Output Enable (OE) and Write Enable (WE) pins. So these pins connections to pins of the JTAG chain device(s) must be specified on the signal pins list. However, if you only intend to read flash memory contents, then OE and WE pins may be left empty on the signal pins list. In this case, the OE and WE pins can be either hardwired on a board (to enable output and disable write) or the pins can be held at constant values by the software using the static pins list (see below for the Static pins tab).

IMPORTANT NOTICE ABOUT ADDRESS BUS: In TopJTAG Flash Programmer, the A0 pin in a signal pins list always means the least significant bit of an address bus! It is not necessary this pin is a pin named 'A0' in the flash memory device datasheet. For example, some 16-bit flash memories when operating in 8-bit mode (the BYTE# is low) have an LSB address pin named 'A-1', so pretend that is A0 for the software, while the chip's 'A0' is A1 on the signal pins list, and so on. Other 16-bit flash memories use the 'A0' pin only when operating in 8-bit mode, and in 16-bit mode they use 'A1' as the LSB address pin. For the latter case, just pretend that the chip's 'A1' pin is A0 for TopJTAG Flash Programmer, the chip's 'A2' is A1 for the software, and so on.

4) Static Pins

Finally, any pins that need to be held at a certain constant value can be specified on static pins list (on the last Static pins tab in the Setup dialog).

Depending on your particular design, you may want TopJTAG Flash Programmer to keep pins like RESET#, Write Protect (WP#) or BYTE# at certain constant states during programming. In addition, if there are several devices sharing the same bus, you may wish to disable these devices by adding their Chip Enable signals with disabling values to the static pins list.

Verify Settings

After setup is completed, run Info action (menu Actions → Info) to verify if all settings are valid. If everything is OK, TopJTAG Flash Programmer will display the Info dialog with information of the detected flash memory manufacturer and device ID, supported command set, and, if flash is CFI-compliant, the CFI table contents.